Meta is addressing high DDR5 memory costs by repurposing legacy DDR4 modules from decommissioned servers. Through a custom-developed Vistara ASIC, the company can attach old DDR4 memory to modern servers running AMD EPYC Turin processors that natively only support DDR5. This CXL 2.0 implementation allows for expanded memory capacity by using DDR4 as a secondary, slower tier for cold data while keeping frequent data in fast DDR5.
- Meta's Vistara ASIC bridges legacy DDR4 with modern DDR5 servers
- CXL 2.0 technology enables tiered memory management via NUMA nodes
- Panmnesia offers scalable CXL controller and switch solutions for data centers
- Strategy aims to mitigate rising DRAM prices and hardware costs
- Meta's Vistara ASIC bridges legacy DDR4 with modern DDR5 servers
- CXL 2.0 technology enables tiered memory management via NUMA nodes
- Panmnesia offers scalable CXL controller and switch solutions for data centers
- Strategy aims to mitigate rising DRAM prices and hardware costs
