AMD’s new Strix Halo mobile platform pushes the limits of integrated GPU
design by rethinking the memory subsystem. The article dives into how the
chip balances low‑latency CPU workloads with the bandwidth‑heavy GPU
demands, detailing the architecture of its Infinity Cache, L1/L2 caches,
and LPDDR5X memory. It covers cross‑CCX latency, zero‑copy behavior,
and the impact of shared memory controllers on contention. By
comparing Strix Halo’s performance to desktop and discrete GPUs,
the author illustrates the trade‑offs that enable a powerful iGPU in a
tablet‑form‑factor device like the ROG Flow Z13.
design by rethinking the memory subsystem. The article dives into how the
chip balances low‑latency CPU workloads with the bandwidth‑heavy GPU
demands, detailing the architecture of its Infinity Cache, L1/L2 caches,
and LPDDR5X memory. It covers cross‑CCX latency, zero‑copy behavior,
and the impact of shared memory controllers on contention. By
comparing Strix Halo’s performance to desktop and discrete GPUs,
the author illustrates the trade‑offs that enable a powerful iGPU in a
tablet‑form‑factor device like the ROG Flow Z13.
