The z386 project aims to implement the Intel 80386 processor core on an FPGA. Recent optimizations have significantly improved its performance, including the implementation of early start memory access and a reduction in branch jump cycles from 9.25 down to six through microcode refinements. These changes resulted in approximately a 39% increase in DOOM benchmark scores, though the project still falls short of original hardware speed and cannot yet boot Windows.
- Implementation of early start memory access for FPGA cores
- Optimization of store queues and branch jump timing
- Significant performance gains in gaming benchmarks
- Implementation of early start memory access for FPGA cores
- Optimization of store queues and branch jump timing
- Significant performance gains in gaming benchmarks
This position paper addresses the growing memory demands of multi-agent systems powered by large language models (LLMs). It frames multi-agent memory as a computer architecture problem, drawing parallels to traditional computer systems where memory hierarchy and bandwidth are critical bottlenecks. The authors distinguish between shared and distributed memory paradigms for agents and propose a three-layer memory hierarchy – I/O, cache, and memory – tailored for agentic systems. Key challenges identified include the need for protocols for cache sharing and memory access, and, crucially, establishing multi-agent memory consistency to ensure coherent and reliable operation.
